The yield of a manufacturing process is the ratio of the product that meets or exceeds its functional and performance specifications to the total product made. Regarding integrated circuit (IC) yield, two types are defined: defect-limited yield (DLY) and circuit-limited yield (CLY). DLY is the ratio of the product that meets functional performance specification to the total product made. CLY is the ratio of the product that meets or exceeds functional performance specification to the total product made.
Particle defects reduce DLY and CLY. If a particle defect prevents the IC from functioning, DLY is reduced. If a particle defect only retards performance, then CLY is reduced.
An example of a particle defect is when a conductive particle falls between two adjacent wires on an IC, and the particle is of sufficient size to contact both wires. Such an occurrence can cause a short circuit in the IC, preventing the IC from functioning and reducing DLY.
The probability of a short circuit caused by a particle defect is proportional to the ratio of the area occupied by the circuit wiring to the total area of the IC. Thus, reducing wiring area reduces the probability of a short circuit caused by a particle defect improving DLY.
Reducing the width of individual conductors within an IC is one way of reducing overall wiring area. However, reducing the width of a conductor increases its resistance, with undesirable effects on associated voltages and IC electrical performance. Further, in a multilayer integrated circuit, reliably interconnecting the wiring layers through vias requires that the conductor have a width the size of the via opening, thereby limiting the reduction in size.
Nothing in the prior art appears to include a method of reducing wiring area without reducing IC electrical performance, and more specifically to address the problem of reduction in DLY due to short circuits caused by particle defects.